KAYA, Z. Et Al. 2023. Memory-Based FFT Architecture With Optimized Number of Multiplexers and Memory Usage. IEEE Transactions on Circuits and Systems II: Express Briefs , vol.70, no.8 , 3084-3088.

KAYA, Z., Garrido, M., & Takala, J., (2023). Memory-Based FFT Architecture With Optimized Number of Multiplexers and Memory Usage. IEEE Transactions on Circuits and Systems II: Express Briefs , vol.70, no.8, 3084-3088.

KAYA, ZEYNEP, Mario Garrido, And Jarmo Takala. "Memory-Based FFT Architecture With Optimized Number of Multiplexers and Memory Usage," IEEE Transactions on Circuits and Systems II: Express Briefs , vol.70, no.8, 3084-3088, 2023

KAYA, ZEYNEP Et Al. "Memory-Based FFT Architecture With Optimized Number of Multiplexers and Memory Usage." IEEE Transactions on Circuits and Systems II: Express Briefs , vol.70, no.8, pp.3084-3088, 2023

KAYA, Z. Garrido, M. And Takala, J. (2023) . "Memory-Based FFT Architecture With Optimized Number of Multiplexers and Memory Usage." IEEE Transactions on Circuits and Systems II: Express Briefs , vol.70, no.8, pp.3084-3088.

@article{article, author={ZEYNEP KAYA Et Al. }, title={Memory-Based FFT Architecture With Optimized Number of Multiplexers and Memory Usage}, journal={IEEE Transactions on Circuits and Systems II: Express Briefs}, year=2023, pages={3084-3088} }